1. Field of the Invention
The present invention relates to a hetero junction bipolar transistor and more particularly, to a method for manufacturing a hetero junction bipolar transistor capable of forming a ledge in a simple manner and producing a ballasting resistor without any process of forming a NiCr thin film, whereby the manufacturing process thereof is carried out in simple and easy manners, thereby improving productivity and an economical efficiency.
2. Description of the Related Art
With the drastic extension of a wireless communication network market, recently, a wireless communication using a microwave band began to emerge and thus, resulted in the giving of much attention on the development of a very high frequency device and the miniaturization and high performance pursuit thereof.
Specifically, Sixe2x80x94BiCMOS, SiGe hetero junction bipolar transistor (HBT), GaAs field effect transistor (FET), AlGaAs/GaAs HBT and so on are competed, as a power device used in a transmitting-part of a wireless communication system, and in case of a wireless communication terminal, at present, the above-mentioned AlGaAs/GaAs hetero junction bipolar transistor is widely used over all of the markets. This is because the AlGaAs/GaAs hetero junction bipolar transistor uses a single power and has an excellent linearity. On the other hand, the hetero junction bipolar transistor has a poor thermal characteristic, which has been solved by the formation of a ballasting resistor.
FIGS. 1a to 1g are sectional views illustrating the processes of manufacturing a conventional hetero junction bipolar transistor (HBT) for power purpose. As shown in FIG. 1a, a substrate, which is composed of an InGaAs/GaAs layer 1, an AlGaAs layer 2 and a GaAs layer 3, is first prepared. In this case, the laminated structure of the AlGaAs/GaAs hetero junction bipolar transistor is formed by the AlGaAs layer 2 and the GaAs layer 3. Then, as shown in FIG. 1b, an emitter metal 4 is formed on the InGaAs/GaAs layer 1 in a vacuum evaporation manner and by using the emitter metal 4 as a masking material, as shown in FIG. 1c, the wet etching process for the InGaAs/GaAs layer 1 is carried out. Next, so as to form a ledge, a patterning process is carried out by using a photoresist 5. Namely, as shown in FIG. 1d, the patterning of a length of 0.2 xcexcm on the basis of the bottom end of the emitter metal 4 is made by using a stepper. The substrate where the patterning is completed by using the corresponding photoresist 5 is subjected to a dry etching and thus, as shown in FIG. 1e, the AlGaAs layer 2 is etched. Also, the substrate is subjected to a somewhat wet etching treatment and a base metal 6 is thus formed in a vacuum evaporation manner on the corresponding etched portion, as shown in FIG. 1f. Next, the photoresist 5 lifts off and as shown in FIG. 1g, the base 6 is then formed. Thereafter, through a vacuum evaporation process of a collector metal and back-end process, a device is formed as shown in FIG. 2. On the other hand, since the hetero junction bipolar transistor should have a ballasting resistor to ensure a thermal characteristic thereof, the ballasting resistor is formed on the emitter or base by using an NiCr thin film as shown in FIG. 3. The final hetero junction bipolar transistor has the equivalent circuit as shown in FIG. 4.
The key processes in manufacturing the conventional hetero junction bipolar transistor device for power purpose are to form the ledge on the emitter and to form the ballasting resistor to compensate for the thermal characteristic. The ledge is the most important element to determine the characteristic and reliability of the hetero junction bipolar transistor, which plays a role in separating the electrons injected in the emitter and the exposed semiconductor boundary surface by a predetermined distance. If the distance is too short, the electrons are trapped on the exposed semiconductor surface, thereby destructing the surface, such that the device characteristic drastically deteriorates. Therefore, the distance is desirably ranged over 0.1 xcexcm. To the contrary, if the distance is too large, the base resistance becomes high. Therefore, in the conventional AlGaAs/GaAs hetero junction bipolar transistor manufacturing process the patterning of the distance of 0.2 xcexcm is carried out by using a stepper, as shown in FIG. 1d and the dry etching is then carried out to form the ledge. However, even the dry etching method is not easy to adjust the etching thickness of hundreds of xc3x85 and the semiconductor surface is also damaged after etching, such that the wet etching treatment should be carried out after the completion of the dry etching. And, the ballasting resistor, which functions to compensate for the thermal characteristic of the hetero junction bipolar transistor element, should be formed on the emitter or base by using the NiCr thin film as shown in FIG. 3.
The conventional hetero junction bipolar transistor manufacturing method arises some problems that the manufacturing processes are complicated to thereby reduce the economical efficiency and productivity thereof, because the patterning is carried out by using an expensive stepper and then, after the application of the dry etching the wet etching should be carried out, for the purpose of forming the ledge, and that the manufacturing processes are more complicated to thereby decrease the productivity thereof, because an additional NiCr thin film is formed for the purpose of forming the ballasting resistor.
It is, therefore, an object of the present invention to provide a method for manufacturing a hetero junction bipolar transistor capable of forming a ledge by using a low-priced contact aligner and in a selective wet etching manner, without having any expensive stepper and dry etching, and forming a ballasting resistor, without having an additional NiCr thin film, whereby the manufacturing processes can be embodied in simple and easy manner, thereby improving productivity and an economical efficiency.
To attain the above-stated object, there is provided a method for manufacturing a hetero junction bipolar transistor comprising the steps of: (a) forming an emitter metal in a vacuum evaporation manner on a substrate composed of an upper InGaAs/GaAs layer, an intermediate InGaP layer, and a lower GaAs layer; (b) carrying out a selective wet etching on the InGaAs/GaAs layer by using the emitter metal as a masking material; (c) forming a thin film of a material selected from the group consisting of Si3N4, SiO2 and TiW on the surface of the emitter metal and the InGaP layer, in the vacuum evaporation manner; (d) carrying out patterning of a photoresist on the thin film by using a contact aligner to form a base opening; (e) carrying out the opening of the thin film positioned on the base opening by the reactive ion etching system; (f) carrying out a wet etching on the intermediate InGaP layer; and (g) forming a base metal in a vacuum evaporation manner and carrying out the lifting off of the photoresist to thereby form base contact.
In the embodiment of the present invention, preferably, a ballasting resistor is adjusted by the distance between the lower end of the emitter metal and the base opening.
In the embodiment of the present invention, the distance between the lower end of the emitter metal and the base opening is preferably at least 2 Am.
In the embodiment of the present invention, preferably, the step (f) of carrying out the wet etching the intermediate InGaP layer comprises forming ledge by selective wet etching the InGaP layer by using the thin film as a masking material.
In the embodiment of the present invention, the InGaP layer is replaced with another material adequate to hetero junction.